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 STS8C5H30L
N-channel 30V - 0.018 - 8A/p-channel 30V - 0.045 - 5A - SO-8 Low gate charge STripFETTM III MOSFET
Features
Type STS8C5H30L(N-channel) STS8C5H30L(P-channel)

VDSS 30V 30V
RDS(on) <0.022 <0.056
ID 8A 5A S0-8
Conduction losses reduced Switching losses reduced Low threshold drive Standard outline for easy automated surface mount assembly
SO-8
Description
This Power MOSFET is the latest development of STMicroelectronics unique "Single Feature SizeTM" strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. Figure 1. Internal schematic diagram
Application
Switching application
Table 1.
Device summary
Part number Marking S8C5H30L Package SO-8 Packaging Tape & reel
STS8C5H30L
Note:
For the P-channel MOSFET actual polarity of voltages and current has to be reversed
July 2007
Rev 4
1/14
www.st.com 14
Contents
STS8C5H30L
Contents
1 2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) ............................ 6
3 4 5
Test circuit
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
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STS8C5H30L
Electrical ratings
1
Electrical ratings
Table 2.
Symbol VDS VGS ID ID IDM (1) PTOT Tstg Tj
Absolute maximum ratings
Value Parameter N-channel Drain-source voltage (vgs = 0) Gate- source voltage Drain current (continuos) at TC = 25C single operating Drain current (continuos) at TC = 100C single operating Drain current (pulsed) Total dissipation at TC = 25C dual operating Total dissipation at TC = 25C single operating Storage temperature Operating junction temperature 16 8 6.4 32 1.6 2 -55 to 150 150 30 16 4.2 3.1 16.8 P-channel V V A A A W W C C Unit
1. Pulse width limited by safe operating area
Table 3.
Thermal data
Thermal resistance junction-ambient single operating Thermal resistance junction-ambient dual operating Maximum lead temperature for soldering purpose 62.5 78 300 C/W C/W C
Rthj-a
Tl
Note:
For the P-channel MOSFET actual polarity of voltages and current has to be reversed
3/14
Electrical characteristics
STS8C5H30L
2
Electrical characteristics
(TCASE=25C unless otherwise specified) Table 4.
Symbol V(BR)DSS
On/off states
Parameter Drain-source Breakdown voltage Zero gate voltage Drain current (VGS = 0) Gate-body leakage current (VDS = 0) Gate threshold voltage Test conditions ID = 250 A, VGS = 0 VDS = Max rating VDS=Max rating, TC=125C VGS = 16V VGS = 16V VDS = VGS, ID = 250A VGS = 10V, ID = 4A VGS = 10V, ID = 2.5A VGS = 4.5V, ID = 4A VGS = 4.5V, ID = 2.5A n-ch p-ch n-ch p-ch n-ch p-ch n-ch p-ch n-ch p-ch n-ch p-ch 1 1 1.6 0.018 0.045 0.020 0.070 Min. 30 30 1 10 100 100 2.5 0.022 0.055 0.025 0.075 Typ. Max. Unit V V A A nA nA V V
IDSS
IGSS VGS(th)
RDS(on)
Static drain-source on resistance
Table 5.
Symbol gfs (1) Ciss Coss Crss Qg Qgs Qgd
Dynamic
Parameter Forward transconductance Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate-source charge Gate-drain charge N-channel VDD=24V ID=8A VGS=5V P-channel VDD = 24V ID = 4A VGS= 5V (see Figure 27) VDS = 25V, f = 1 MHz, VGS = 0 Test conditions VDS = 15V, ID= 4A VDS = 15V, ID= 2.5A n-ch p-ch n-ch p-ch n-ch p-ch n-ch p-ch n-ch p-ch n-ch p-ch n-ch p-ch Min. Typ. 8.5 10 857 1350 147 490 20 130 7 12.5 2.5 5 2.3 3 10 16 Max. Unit S S pF pF pF pF pF pF nC nC nC nC nC nC
1. Pulsed: Pulse duration = 300 s, duty cycle 1.5.
Note:
For the P-channel MOSFET actual polarity of voltages and current has to be reversed
4/14
STS8C5H30L Table 6.
Symbol
Electrical characteristics Switching times
Parameter Test conditions N-channel VDD = 15V, ID = 4A , RG=4.7 VGS = 4.5V P-channel VDD = 15V, ID = 2A , RG=4.7 VGS = 4.5V (see Figure 26) N-channel VDD = 15V, ID = 4A , RG=4.7 VGS = 4.5V P-channel VDD = 15V, ID = 2A , RG=4.7 VGS = 4.5V (see Figure 26) Min. Typ. Max. Unit
td(on) tr
Turn-on delay time Rise time
n-ch p-ch n-ch p-ch
12 25 14.5 35
ns ns ns ns
td(off) tf
Turn-off delay time Fall time
n-ch p-ch n-ch p-ch
23 125 8 35
ns ns ns ns
Table 7.
Symbol ISD ISDM (1) VSD (2)
Source drain diode
Parameter Source-drain current Source-drain current (pulsed) Forward on voltage ISD = 8A, VGS = 0 ISD = 5A, VGS = 0 N-channel ISD = 8A, di/dt = 100A/s VDD=15 V,Tj =150 oC P-channel ISD = 5 A, di/dt = 100A/s VDD=15 V, Tj =150 oC (see Figure 28) Test conditions n-ch p-ch n-ch p-ch n-ch p-ch n-ch p-ch n-ch p-ch n-ch p-ch 15 45 5.7 36 0.76 1.6 Min Typ. Max 8 5 32 20 1.5 1.2 Unit A A A A V V ns ns nC nC A A
trr Qrr IRRM
Reverse recovery time Reverse recovery charge Reverse recovery current
1. Pulse width limited by safe operating area. 2. Pulsed: Pulse duration = 300 s, duty cycle 1.5%
5/14
Electrical characteristics
STS8C5H30L
2.1
Figure 2.
Electrical characteristics (curves)
Safe operating area n-ch Figure 3. Thermal impedance n-ch
Figure 4.
Output characteristics n-ch
Figure 5.
Transfer characteristics n-ch
Figure 6.
Transconductance n-ch
Figure 7.
Static drain-source on resistance nch
6/14
STS8C5H30L Figure 8. Gate charge vs. gate-source voltage Figure 9. n-ch
Electrical characteristics Capacitance variations n-ch
Figure 10. Normalized gate threshold voltage vs. temperature n-ch
Figure 11. Normalized on resistance vs. temperature n-ch
Figure 12. Source-drain diode forward characteristics n-ch
Figure 13. Normalized breakdown voltage vs. temperature n-ch
7/14
Electrical characteristics Figure 14. Safe operating area p-ch
STS8C5H30L Figure 15. Thermal impedance p-ch
Figure 16. Output characteristics p-ch
Figure 17. Transfer characteristics p-ch
Figure 18. Transconductance p-ch
Figure 19. Static drain-source on resistance pch
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STS8C5H30L
Electrical characteristics
Figure 20. Gate charge vs. gate-source voltage Figure 21. Capacitance variations p-ch p-ch
Figure 22. Normalized gate threshold voltage vs. temperature p-ch
Figure 23. Normalized on resistance vs. temperature p-ch
Figure 24. Source-drain diode forward characteristics p-ch
Figure 25. Normalized breakdown voltage vs. temperature p-ch
9/14
Test circuit
STS8C5H30L
3
Test circuit
Figure 27. Gate charge test circuit
Figure 26. Switching times test circuit for resistive load
Figure 28. Test circuit for inductive load Figure 29. Unclamped Inductive load test switching and diode recovery times circuit
Figure 30. Unclamped inductive waveform
Figure 31. Switching time waveform
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STS8C5H30L
Package mechanical data
4
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com
11/14
Package mechanical data
STS8C5H30L
SO-8 MECHANICAL DATA
DIM. A a1 a2 a3 b b1 C c1 D E e e3 F L M S 3.8 0.4 4.8 5.8 1.27 3.81 4.0 1.27 0.6 8 (max.) 0.14 0.015 5.0 6.2 0.65 0.35 0.19 0.25 0.1 mm. MIN. TYP MAX. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 0.188 0.228 0.050 0.150 0.157 0.050 0.023 0.196 0.244 0.025 0.013 0.007 0.010 0.003 MIN. inch TYP. MAX. 0.068 0.009 0.064 0.033 0.018 0.010 0.019
12/14
STS8C5H30L
Revision history
5
Revision history
Table 8.
Date 17-Sep-2004 31-Oct-2006 30-Jan-2007 23-Jul-2007
Revision history
Revision 1 2 3 4 First revision The document has been reformatted typo mistake on Table 2. Figure 14 has been updated Changes
13/14
STS8C5H30L
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